Where a DMA transfer is to be conducted by making up a descriptor chain, in general, descriptor information is set in a register or memory, a control circuit reads the descriptor information, and the DMA transfer is executed according to the descriptor information that is read. The descriptor information includes information such as the head address of a transfer source, a transfer frame size, a next-descriptor number (address), and the last descriptor flag.
When conducting the DMA transfer, the entire descriptor chain cannot sometimes be transferred by a single activation as in a case where, for example, the count of frames that can be transferred by a single activation is limited.
Patent Literature 1 includes a description as follows. A 1-bit value indicating whether or not a DMA transfer is to be performed is added to descriptor information. If the readout value indicates that the transfer will not be performed, a control circuit does not transfer a pertinent frame but shifts to an operation of reading the next descriptor information.